LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE ieee.std_logic_unsigned.all;

ENTITY multi_n_palet IS
	GENERIC (
		nombre : integer range 1 to 63 := 8
	);
	PORT (
		line_in		: IN  integer range 0 to 511;
		row_in	    : IN  integer range 0 to 1023;

		row_out		: OUT integer range 0 to 1023;
		line_out	: OUT integer range 0 to 511;

		code_out    : OUT integer range 0 to 7;
		code_in     : IN  integer range 0 to 7;

		choix_in	: IN  std_logic_vector(7 downto 0);
		donnee      : OUT std_logic_vector(11 downto 0);
    
		win_in		: IN  std_logic;
		win_out		: OUT std_logic;

		blank_in    : in std_logic;
		sync_in     : in std_logic;
		burst_in	: in std_logic;
		blank_out   : out std_logic;
		sync_out    : out std_logic;
		burst_out	: out std_logic;

		reset_n     : IN  std_logic;
		clock       : IN  std_logic;

		code_detect : in integer range 0 to 7;
		code_ok     : in integer range 0 to 7;

		seuilpixel  : in integer range 0 to 15;
		seuilligne  : in integer range 0 to 15;

		write_code  : in std_logic;
		select_code : in std_logic_vector(5 downto 0)
	);

END multi_n_palet ;


ARCHITECTURE a OF multi_n_palet IS

component palet
	PORT (
		cpt_line	: IN  integer range 0 to 511;
		cpt_row	    : IN  integer range 0 to 1023;

		cpt_row_out : OUT integer range 0 to 1023;
		cpt_line_out: OUT integer range 0 to 511;

		code_out    : OUT integer range 0 to 7;
		code_in     : IN  integer range 0 to 7;

		choix       : IN  std_logic_vector(1 downto 0);
		donnee      : OUT std_logic_vector(11 downto 0);
    
		en_win      : IN  std_logic;
		so_win      : OUT std_logic;

		blank_in    : in std_logic;
		sync_in     : in std_logic;
		burst_in	: in std_logic;
		blank_out   : out std_logic;
		sync_out    : out std_logic;
		burst_out	: out std_logic;

		reset_n     : IN  std_logic;
		clock       : IN  std_logic;

		code_detect : in integer range 0 to 7;
		code_ok     : in integer range 0 to 7;

		seuilpixel  : in integer range 0 to 15;
		seuilligne  : in integer range 0 to 15
	);
END component ;

signal choixdata : std_logic_vector(1 downto 0);
signal choixpalet : std_logic_vector(5 downto 0);

type multi_line		is array(0 to nombre) of integer range 0 to 511;
type multi_row		is array(0 to nombre) of integer range 0 to 1023;
type multi_code		is array(0 to nombre) of integer range 0 to 7;
type multi_donnee	is array(0 to nombre-1) of std_logic_vector(11 downto 0);
type multi_stdlogic	is array(0 to nombre) of std_logic;

signal p_line_in	: multi_line;
signal p_row_in		: multi_row;
signal p_code_in	: multi_code;
signal p_donnee		: multi_donnee;
signal p_en_win		: multi_stdlogic;
signal p_blank_in	: multi_stdlogic;
signal p_sync_in	: multi_stdlogic;
signal p_burst_in	: multi_stdlogic;
signal p_code_detect : multi_code;
signal p_code_ok	: multi_code;

BEGIN

choixdata <= choix_in(1 downto 0);
choixpalet <= choix_in(7 downto 2);

p_line_in(0)	<= line_in;
p_row_in(0)		<= row_in;
p_code_in(0)	<= code_in;
p_en_win(0)		<= win_in;
p_blank_in(0)	<= blank_in;
p_sync_in(0)	<= sync_in;
p_burst_in(0)	<= burst_in;

row_out   <= p_row_in(nombre);
line_out  <= p_line_in(nombre);
code_out  <= p_code_in(nombre);
win_out   <= p_en_win(nombre);
blank_out <= p_blank_in(nombre);
sync_out  <= p_sync_in(nombre);

donnee <= p_donnee(to_integer(unsigned(choixpalet)));

muxeur : process(select_code, code_ok, code_detect, write_code)
begin
	if write_code = '1' then
		p_code_ok(to_integer(unsigned(select_code))) <= code_ok;
		p_code_detect(to_integer(unsigned(select_code))) <= code_detect;
	end if;
end process;

palets : for i in 0 to nombre-1 generate
	un_palet : palet
		PORT MAP
		(
			cpt_line => p_line_in(i),
			cpt_row => p_row_in(i),
			cpt_row_out => p_row_in(i+1),
			cpt_line_out => p_line_in(i+1),
			code_out => p_code_in(i+1),
			code_in => p_code_in(i),
			choix => choixdata,
			donnee => p_donnee(i),
			en_win => p_en_win(i),
			so_win => p_en_win(i+1),
			blank_in => p_blank_in(i),
			burst_in => p_burst_in(i),
			sync_in => p_sync_in(i),
			blank_out => p_blank_in(i+1),
			burst_out => p_burst_in(i+1),
			sync_out => p_sync_in(i+1),
			reset_n => reset_n,
			clock => clock,
			code_detect => p_code_detect(i),
			code_ok => p_code_ok(i),
			seuilpixel => seuilpixel,
			seuilligne => seuilligne
		);
	end generate;

END a;