LIBRARY ieee, work;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE ieee.std_logic_unsigned.all;

ENTITY minmax IS
	GENERIC (
		CONSTANT taille : natural := 3
	);
	PORT (
		inA     : in	std_logic_vector(taille-1 downto 0);
		inB     : in	std_logic_vector(taille-1 downto 0);

		min     : out	std_logic_vector(taille-1 downto 0);
		max     : out	std_logic_vector(taille-1 downto 0)
	);

END minmax ;

ARCHITECTURE a OF minmax IS

BEGIN

	combi : process(inA, inB)
	begin
		if inA < inB then
			min <= inA;
			max <= inB;
		else
			min <= inB;
			max <= inA;
		end if;
	end process;

END a;